Changes to PLL, renamed bpsk31 line decoder to bpsk31_varicode2ascii_sy_u8
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b36b01e9cf
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07ca9fd73f
2 changed files with 20 additions and 19 deletions
14
csdr.c
14
csdr.c
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@ -1,4 +1,4 @@
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/*
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u/*
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This software is part of libcsdr, a set of simple DSP routines for
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Software Defined Radio.
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@ -113,7 +113,7 @@ char usage[]=
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" fft_exchange_sides_ff <fft_size>\n"
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" squelch_and_smeter_cc --fifo <squelch_fifo> --outfifo <smeter_fifo> <use_every_nth> <report_every_nth>\n"
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" fifo <buffer_size> <number_of_buffers>\n"
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" bpsk31_line_decoder_sy_u8\n"
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" bpsk31_varicode2ascii_sy_u8\n"
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" invert_sy_sy\n"
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" rtty_line_decoder_sy_u8\n"
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" rtty_baudot2ascii_u8_u8\n"
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@ -1839,7 +1839,7 @@ int main(int argc, char *argv[])
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}
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}
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if(!strcmp(argv[1],"bpsk31_line_decoder_sy_u8"))
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if(!strcmp(argv[1],"bpsk31_varicode2ascii_sy_u8"))
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{
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unsigned long long status_shr = 0;
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unsigned char output;
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@ -1970,13 +1970,13 @@ int main(int argc, char *argv[])
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}
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else if(pll.pll_type == PLL_2ND_ORDER_IIR_LOOP_FILTER)
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{
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float bandwidth = 0.01, ko = 10, kd=100, damping_factor = 0.707;
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float bandwidth = 0.01, ko = 10, kd=0.1, damping_factor = 0.707;
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if(argc>3) sscanf(argv[3],"%f",&bandwidth);
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if(argc>4) sscanf(argv[4],"%f",&damping_factor);
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if(argc>5) sscanf(argv[5],"%f",&ko);
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if(argc>6) sscanf(argv[6],"%f",&kd);
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pll_cc_init_2nd_order_IIR(&pll, bandwidth, ko, kd, damping_factor);
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//fprintf(stderr, "%f %f %f | a: %f %f %f | b: %f %f %f\n", bandwidth, gain, damping_factor,
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fprintf(stderr, "bw=%f damping=%f ko=%f kd=%f alpha=%f beta=%f\n", bandwidth, damping_factor, ko, kd, pll.alpha, pll.beta);
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// pll.filter_taps_a[0], pll.filter_taps_a[1], pll.filter_taps_a[2], pll.filter_taps_b[0], pll.filter_taps_b[1], pll.filter_taps_b[2]);
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}
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else return badsyntax("invalid pll_type. Valid values are:\n\t1: PLL_1ST_ORDER_IIR_LOOP_FILTER\n\t2: PLL_2ND_ORDER_IIR_LOOP_FILTER");
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@ -1987,12 +1987,12 @@ int main(int argc, char *argv[])
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{
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FEOF_CHECK;
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FREAD_C;
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fprintf(stderr, "| i");
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//fprintf(stderr, "| i");
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// pll_cc(&pll, (complexf*)input_buffer, output_buffer, NULL, the_bufsize);
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// fwrite(output_buffer, sizeof(float), the_bufsize, stdout);
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pll_cc(&pll, (complexf*)input_buffer, NULL, (complexf*)output_buffer, the_bufsize);
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fwrite(output_buffer, sizeof(complexf), the_bufsize, stdout);
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fprintf(stderr, "| o");
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//fprintf(stderr, "| o");
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TRY_YIELD;
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}
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}
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25
libcsdr.c
25
libcsdr.c
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@ -1338,12 +1338,13 @@ void binary_slicer_f_u8(float* input, unsigned char* output, int input_size)
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void pll_cc_init_2nd_order_IIR(pll_t* p, float bandwidth, float ko, float kd, float damping_factor)
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{
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//kd: detector gain
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//ko: VCO gain
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float bandwidth_omega = 2*M_PI*bandwidth;
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p->alpha = (damping_factor*2*bandwidth_omega)/(ko*kd);
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float sampling_rate = 1; //the bandwidth is normalized to the sampling rate
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p->beta = (bandwidth_omega*bandwidth_omega)/(sampling_rate*ko*kd);
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p->iir_temp = p->dphase = p->output_phase = 0;
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// s=tf([0.02868000,0.00080000,-0.02788000],[1 -2 1]); pzmap(s)
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}
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void pll_cc_init_1st_order_IIR(pll_t* p, float alpha)
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@ -1366,17 +1367,17 @@ void pll_cc(pll_t* p, complexf* input, float* output_dphase, complexf* output_nc
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if(output_nco) output_nco[i] = current_nco; //we don't output anything if it is a NULL pointer
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//accurate phase detector: calculating error from phase offset
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// float input_phase = atan2(iof(input,i),qof(input,i));
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// float new_dphase = input_phase - p->output_phase;
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// while(new_dphase>PI) new_dphase-=2*PI;
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// while(new_dphase<-PI) new_dphase+=2*PI;
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float input_phase = atan2(iof(input,i),qof(input,i));
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float new_dphase = input_phase - p->output_phase;
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while(new_dphase>PI) new_dphase-=2*PI;
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while(new_dphase<-PI) new_dphase+=2*PI;
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//modeling analog phase detector: abs(input[i] * conj(current_nco))
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qof(¤t_nco,0)=-qof(¤t_nco,0); //calculate conjugate
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complexf multiply_result;
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cmult(&multiply_result, &input[i], ¤t_nco);
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output_nco[i] = multiply_result;
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float new_dphase = absof(&multiply_result,0);
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//modeling analog phase detector, which would be abs(input[i] * current_nco) if we had a real output signal, but what if we have complex signals?
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//qof(¤t_nco,0)=-qof(¤t_nco,0); //calculate conjugate
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//complexf multiply_result;
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//cmult(&multiply_result, &input[i], ¤t_nco);
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//output_nco[i] = multiply_result;
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//float new_dphase = absof(&multiply_result,0);
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if(p->pll_type == PLL_2ND_ORDER_IIR_LOOP_FILTER)
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{
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@ -1392,7 +1393,7 @@ void pll_cc(pll_t* p, complexf* input, float* output_dphase, complexf* output_nc
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}
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else return;
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if(output_dphase) output_dphase[i] = -p->dphase;
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if(output_dphase) output_dphase[i] = new_dphase/10;
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//if(output_dphase) output_dphase[i] = new_dphase/10;
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}
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}
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