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Changes to PLL, renamed bpsk31 line decoder to bpsk31_varicode2ascii_sy_u8

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This commit is contained in:
ha7ilm 2016-05-22 18:27:20 +02:00
parent b36b01e9cf
commit 07ca9fd73f
2 changed files with 20 additions and 19 deletions
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14
csdr.c
View file

@ -1,4 +1,4 @@
/* u/*
This software is part of libcsdr, a set of simple DSP routines for This software is part of libcsdr, a set of simple DSP routines for
Software Defined Radio. Software Defined Radio.
@ -113,7 +113,7 @@ char usage[]=
" fft_exchange_sides_ff <fft_size>\n" " fft_exchange_sides_ff <fft_size>\n"
" squelch_and_smeter_cc --fifo <squelch_fifo> --outfifo <smeter_fifo> <use_every_nth> <report_every_nth>\n" " squelch_and_smeter_cc --fifo <squelch_fifo> --outfifo <smeter_fifo> <use_every_nth> <report_every_nth>\n"
" fifo <buffer_size> <number_of_buffers>\n" " fifo <buffer_size> <number_of_buffers>\n"
" bpsk31_line_decoder_sy_u8\n" " bpsk31_varicode2ascii_sy_u8\n"
" invert_sy_sy\n" " invert_sy_sy\n"
" rtty_line_decoder_sy_u8\n" " rtty_line_decoder_sy_u8\n"
" rtty_baudot2ascii_u8_u8\n" " rtty_baudot2ascii_u8_u8\n"
@ -1839,7 +1839,7 @@ int main(int argc, char *argv[])
} }
} }
if(!strcmp(argv[1],"bpsk31_line_decoder_sy_u8")) if(!strcmp(argv[1],"bpsk31_varicode2ascii_sy_u8"))
{ {
unsigned long long status_shr = 0; unsigned long long status_shr = 0;
unsigned char output; unsigned char output;
@ -1970,13 +1970,13 @@ int main(int argc, char *argv[])
} }
else if(pll.pll_type == PLL_2ND_ORDER_IIR_LOOP_FILTER) else if(pll.pll_type == PLL_2ND_ORDER_IIR_LOOP_FILTER)
{ {
float bandwidth = 0.01, ko = 10, kd=100, damping_factor = 0.707; float bandwidth = 0.01, ko = 10, kd=0.1, damping_factor = 0.707;
if(argc>3) sscanf(argv[3],"%f",&bandwidth); if(argc>3) sscanf(argv[3],"%f",&bandwidth);
if(argc>4) sscanf(argv[4],"%f",&damping_factor); if(argc>4) sscanf(argv[4],"%f",&damping_factor);
if(argc>5) sscanf(argv[5],"%f",&ko); if(argc>5) sscanf(argv[5],"%f",&ko);
if(argc>6) sscanf(argv[6],"%f",&kd); if(argc>6) sscanf(argv[6],"%f",&kd);
pll_cc_init_2nd_order_IIR(&pll, bandwidth, ko, kd, damping_factor); pll_cc_init_2nd_order_IIR(&pll, bandwidth, ko, kd, damping_factor);
//fprintf(stderr, "%f %f %f | a: %f %f %f | b: %f %f %f\n", bandwidth, gain, damping_factor, fprintf(stderr, "bw=%f damping=%f ko=%f kd=%f alpha=%f beta=%f\n", bandwidth, damping_factor, ko, kd, pll.alpha, pll.beta);
// pll.filter_taps_a[0], pll.filter_taps_a[1], pll.filter_taps_a[2], pll.filter_taps_b[0], pll.filter_taps_b[1], pll.filter_taps_b[2]); // pll.filter_taps_a[0], pll.filter_taps_a[1], pll.filter_taps_a[2], pll.filter_taps_b[0], pll.filter_taps_b[1], pll.filter_taps_b[2]);
} }
else return badsyntax("invalid pll_type. Valid values are:\n\t1: PLL_1ST_ORDER_IIR_LOOP_FILTER\n\t2: PLL_2ND_ORDER_IIR_LOOP_FILTER"); else return badsyntax("invalid pll_type. Valid values are:\n\t1: PLL_1ST_ORDER_IIR_LOOP_FILTER\n\t2: PLL_2ND_ORDER_IIR_LOOP_FILTER");
@ -1987,12 +1987,12 @@ int main(int argc, char *argv[])
{ {
FEOF_CHECK; FEOF_CHECK;
FREAD_C; FREAD_C;
fprintf(stderr, "| i"); //fprintf(stderr, "| i");
// pll_cc(&pll, (complexf*)input_buffer, output_buffer, NULL, the_bufsize); // pll_cc(&pll, (complexf*)input_buffer, output_buffer, NULL, the_bufsize);
// fwrite(output_buffer, sizeof(float), the_bufsize, stdout); // fwrite(output_buffer, sizeof(float), the_bufsize, stdout);
pll_cc(&pll, (complexf*)input_buffer, NULL, (complexf*)output_buffer, the_bufsize); pll_cc(&pll, (complexf*)input_buffer, NULL, (complexf*)output_buffer, the_bufsize);
fwrite(output_buffer, sizeof(complexf), the_bufsize, stdout); fwrite(output_buffer, sizeof(complexf), the_bufsize, stdout);
fprintf(stderr, "| o"); //fprintf(stderr, "| o");
TRY_YIELD; TRY_YIELD;
} }
} }

25
libcsdr.c
View file

@ -1338,12 +1338,13 @@ void binary_slicer_f_u8(float* input, unsigned char* output, int input_size)
void pll_cc_init_2nd_order_IIR(pll_t* p, float bandwidth, float ko, float kd, float damping_factor) void pll_cc_init_2nd_order_IIR(pll_t* p, float bandwidth, float ko, float kd, float damping_factor)
{ {
//kd: detector gain
//ko: VCO gain
float bandwidth_omega = 2*M_PI*bandwidth; float bandwidth_omega = 2*M_PI*bandwidth;
p->alpha = (damping_factor*2*bandwidth_omega)/(ko*kd); p->alpha = (damping_factor*2*bandwidth_omega)/(ko*kd);
float sampling_rate = 1; //the bandwidth is normalized to the sampling rate float sampling_rate = 1; //the bandwidth is normalized to the sampling rate
p->beta = (bandwidth_omega*bandwidth_omega)/(sampling_rate*ko*kd); p->beta = (bandwidth_omega*bandwidth_omega)/(sampling_rate*ko*kd);
p->iir_temp = p->dphase = p->output_phase = 0; p->iir_temp = p->dphase = p->output_phase = 0;
// s=tf([0.02868000,0.00080000,-0.02788000],[1 -2 1]); pzmap(s)
} }
void pll_cc_init_1st_order_IIR(pll_t* p, float alpha) void pll_cc_init_1st_order_IIR(pll_t* p, float alpha)
@ -1366,17 +1367,17 @@ void pll_cc(pll_t* p, complexf* input, float* output_dphase, complexf* output_nc
if(output_nco) output_nco[i] = current_nco; //we don't output anything if it is a NULL pointer if(output_nco) output_nco[i] = current_nco; //we don't output anything if it is a NULL pointer
//accurate phase detector: calculating error from phase offset //accurate phase detector: calculating error from phase offset
// float input_phase = atan2(iof(input,i),qof(input,i)); float input_phase = atan2(iof(input,i),qof(input,i));
// float new_dphase = input_phase - p->output_phase; float new_dphase = input_phase - p->output_phase;
// while(new_dphase>PI) new_dphase-=2*PI; while(new_dphase>PI) new_dphase-=2*PI;
// while(new_dphase<-PI) new_dphase+=2*PI; while(new_dphase<-PI) new_dphase+=2*PI;
//modeling analog phase detector: abs(input[i] * conj(current_nco)) //modeling analog phase detector, which would be abs(input[i] * current_nco) if we had a real output signal, but what if we have complex signals?
qof(&current_nco,0)=-qof(&current_nco,0); //calculate conjugate //qof(&current_nco,0)=-qof(&current_nco,0); //calculate conjugate
complexf multiply_result; //complexf multiply_result;
cmult(&multiply_result, &input[i], &current_nco); //cmult(&multiply_result, &input[i], &current_nco);
output_nco[i] = multiply_result; //output_nco[i] = multiply_result;
float new_dphase = absof(&multiply_result,0); //float new_dphase = absof(&multiply_result,0);
if(p->pll_type == PLL_2ND_ORDER_IIR_LOOP_FILTER) if(p->pll_type == PLL_2ND_ORDER_IIR_LOOP_FILTER)
{ {
@ -1392,7 +1393,7 @@ void pll_cc(pll_t* p, complexf* input, float* output_dphase, complexf* output_nc
} }
else return; else return;
if(output_dphase) output_dphase[i] = -p->dphase; if(output_dphase) output_dphase[i] = -p->dphase;
if(output_dphase) output_dphase[i] = new_dphase/10; //if(output_dphase) output_dphase[i] = new_dphase/10;
} }
} }