rpitx/csdr
1
0
Fork 0
Code Issues Pull requests Packages Projects Releases Wiki Activity

Got the VCO output inverted (and the signal as well), so now the output and the input are actually in phase.

Browse source
This commit is contained in:
ha7ilm 2016-05-09 14:06:03 +02:00
parent 20a2cdc73c
commit 88068ec517
1 changed files with 4 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
csdr.c
View file

@ -1987,10 +1987,10 @@ int main(int argc, char *argv[])
FEOF_CHECK; FEOF_CHECK;
FREAD_C; FREAD_C;
//pll_cc(&pll, (complexf*)input_buffer, NULL, (complexf*)output_buffer, the_bufsize); //pll_cc(&pll, (complexf*)input_buffer, NULL, (complexf*)output_buffer, the_bufsize);
//fprintf(stderr, "| i"); // fprintf(stderr, "| i");
//pll_cc(&pll, (complexf*)input_buffer, output_buffer, NULL, the_bufsize); pll_cc(&pll, (complexf*)input_buffer, output_buffer, NULL, the_bufsize);
pll_cc(&pll, (complexf*)input_buffer, NULL, (complexf*)output_buffer, the_bufsize); //pll_cc(&pll, (complexf*)input_buffer, NULL, (complexf*)output_buffer, the_bufsize);
fwrite(output_buffer, sizeof(complexf), the_bufsize, stdout); fwrite(output_buffer, sizeof(float), the_bufsize, stdout);
//fprintf(stderr, "| o"); //fprintf(stderr, "| o");
TRY_YIELD; TRY_YIELD;
} }