Add frontporch

This commit is contained in:
F5OEO 2018-12-23 17:25:23 +00:00
parent 4ee1aa28dd
commit 5419622f6b

View file

@ -53,6 +53,7 @@ atv::atv(uint64_t TuneFrequency, uint32_t SR, int Channel, uint32_t Lines) : buf
sampletab[(buffersize * registerbysample - 2)] = (0x5A << 24) + (1 & 0x7) + (1 << 4) + (0 << 3); // Amp 1 sampletab[(buffersize * registerbysample - 2)] = (0x5A << 24) + (1 & 0x7) + (1 << 4) + (0 << 3); // Amp 1
sampletab[(buffersize * registerbysample - 1)] = (0x5A << 24) + (0 & 0x7) + (1 << 4) + (0 << 3); // Amp 0 sampletab[(buffersize * registerbysample - 1)] = (0x5A << 24) + (0 & 0x7) + (1 << 4) + (0 << 3); // Amp 0
sampletab[(buffersize * registerbysample - 3)] = (0x5A << 24) + (4 & 0x7) + (1 << 4) + (0 << 3); // Amp 1
SetDmaAlgo(); SetDmaAlgo();
} }
@ -71,6 +72,8 @@ void atv::SetDmaAlgo()
uint32_t level0= mem_virt_to_phys(&usermem[(buffersize * registerbysample - 1)]); uint32_t level0= mem_virt_to_phys(&usermem[(buffersize * registerbysample - 1)]);
uint32_t level1= mem_virt_to_phys(&usermem[(buffersize * registerbysample - 2)]); uint32_t level1= mem_virt_to_phys(&usermem[(buffersize * registerbysample - 2)]);
uint32_t level4= mem_virt_to_phys(&usermem[(buffersize * registerbysample - 3)]);
int shortsync_0=2; int shortsync_0=2;
int shortsync_1=30; int shortsync_1=30;
@ -78,7 +81,9 @@ void atv::SetDmaAlgo()
int longsync_1=2; int longsync_1=2;
int normalsync_0=4; int normalsync_0=4;
int normalsync_1=8; int normalsync_1=6;
int frontsync_1=2;
for (int frame = 0; frame < 2; frame++) for (int frame = 0; frame < 2; frame++)
{ {
@ -297,9 +302,9 @@ void atv::SetDmaAlgo()
//@0 //@0
//DATA IN / 1us //DATA IN / 1us
cbp->info = 0; //BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ; cbp->info = 0; //BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ;
if(line<10) //remove 10 lines if(line<20) cbp->src=level1;
cbp->src=level1; //if((line>=20)&&(line<40)) cbp->src=level4;
else if(line>=20)
cbp->src = mem_virt_to_phys(&usermem[samplecnt * registerbysample+frame*312*registerbysample]); //Amp 1 cbp->src = mem_virt_to_phys(&usermem[samplecnt * registerbysample+frame*312*registerbysample]); //Amp 1
cbp->dst = 0x7E000000 + (PADS_GPIO_0 << 2) + PADS_GPIO; cbp->dst = 0x7E000000 + (PADS_GPIO_0 << 2) + PADS_GPIO;
@ -323,11 +328,11 @@ void atv::SetDmaAlgo()
cbp->next = mem_virt_to_phys(cbp + 1); cbp->next = mem_virt_to_phys(cbp + 1);
cbp++; cbp++;
} }
/*
//FRONT PORSH //FRONT PORSH
//SYNC 2us //SYNC 2us
cbp->info = 0; //BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ; cbp->info = 0; //BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ;
cbp->src = mem_virt_to_phys(&usermem[(buffersize * registerbysample - 2)]); //Amp 1 cbp->src = level1; //Amp 1
cbp->dst = 0x7E000000 + (PADS_GPIO_0 << 2) + PADS_GPIO; cbp->dst = 0x7E000000 + (PADS_GPIO_0 << 2) + PADS_GPIO;
cbp->length = 4; cbp->length = 4;
cbp->stride = 0; cbp->stride = 0;
@ -344,10 +349,10 @@ void atv::SetDmaAlgo()
cbp->dst = 0x7E000000 + (PWM_FIFO << 2) + PWM_BASE; cbp->dst = 0x7E000000 + (PWM_FIFO << 2) + PWM_BASE;
else else
cbp->dst = 0x7E000000 + (PCM_FIFO_A << 2) + PCM_BASE; cbp->dst = 0x7E000000 + (PCM_FIFO_A << 2) + PCM_BASE;
cbp->length = 4 * 2; //2us cbp->length = 4 * frontsync_1; //2us
cbp->stride = 0; cbp->stride = 0;
cbp->next = mem_virt_to_phys(cbp + 1); cbp->next = mem_virt_to_phys(cbp + 1);
cbp++;*/ cbp++;
} }
} }
cbp--; cbp--;