From d23e1fd8fc38f3b208c6ace30c8040c4c702c968 Mon Sep 17 00:00:00 2001 From: F5OEO Date: Fri, 4 Jan 2019 10:55:04 +0000 Subject: [PATCH] Reduce Max PLL frequency to 1.4ghz --- src/dma.cpp | 4 +++- src/gpio.cpp | 2 +- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/src/dma.cpp b/src/dma.cpp index 377dcf7..b9ca0ac 100644 --- a/src/dma.cpp +++ b/src/dma.cpp @@ -126,6 +126,7 @@ int dma::start() dma_reg.gpioreg[DMA_DEBUG+channel*0x40] = 7; // clear debug error flags usleep(100); dma_reg.gpioreg[DMA_CS+channel*0x40] = DMA_CS_PRIORITY(7) | DMA_CS_PANIC_PRIORITY(7) | DMA_CS_DISDEBUG |DMA_CS_ACTIVE; + Started=true; return 0; } @@ -139,6 +140,7 @@ int dma::stop() usleep(100); dma_reg.gpioreg[DMA_DEBUG+channel*0x40] = 7; // clear debug error flags usleep(100); + Started=false; return 0; } @@ -260,7 +262,7 @@ int bufferdma::PushSample(int Index) if(last_sample>buffersize/4) { start(); // 1/4 Fill buffer before starting DMA - Started=true; + } diff --git a/src/gpio.cpp b/src/gpio.cpp index 8e495ff..d762509 100644 --- a/src/gpio.cpp +++ b/src/gpio.cpp @@ -207,7 +207,7 @@ int clkgpio::ComputeBestLO(uint64_t Frequency, int Bandwidth) // Constants taken https://github.com/raspberrypi/linux/blob/ffd7bf4085b09447e5db96edd74e524f118ca3fe/drivers/clk/bcm/clk-bcm2835.c#L1763 //MIN RATE is NORMALLY 600MHZ #define MIN_PLL_RATE 200e6 - #define MIN_PLL_RATE_USE_PDIV 1700e6 + #define MIN_PLL_RATE_USE_PDIV 1500e6 //1700 works but some ticky breaks in clock..PLL should be at limit #define MAX_PLL_RATE 4e9 #define XTAL_RATE 19.2e6 double xtal_freq_recip = 1.0 / XTAL_RATE; // todo PPM correction