399 lines
17 KiB
C++
399 lines
17 KiB
C++
/*
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Copyright (C) 2018 Evariste COURJAUD F5OEO
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "stdio.h"
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#include "atv.h"
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#include "gpio.h"
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#include <unistd.h>
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#include <math.h>
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#include <time.h>
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#include <sched.h>
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#include <stdlib.h>
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atv::atv(uint64_t TuneFrequency, uint32_t SR, int Channel, uint32_t Lines) : bufferdma(Channel, 20 + /*(fixme)*/ 2 + Lines * (6 + (52 * 2)), 2, 1)
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// Need 2 more bytes for 0 and 1
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// Need 6 CB more for sync, if so as 2CBby sample : 3
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{
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SampleRate = SR;
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tunefreq = TuneFrequency;
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clkgpio::SetAdvancedPllMode(true);
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clkgpio::SetCenterFrequency(TuneFrequency, SampleRate);
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clkgpio::SetFrequency(0);
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clkgpio::enableclk(4); // GPIO 4 CLK by default
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syncwithpwm = true;
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if (syncwithpwm)
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{
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pwmgpio::SetPllNumber(clk_plld, 1);
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pwmgpio::SetFrequency(SampleRate);
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}
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else
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{
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pcmgpio::SetPllNumber(clk_plld, 1);
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pcmgpio::SetFrequency(SampleRate);
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}
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padgpio pad;
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Originfsel = pad.gpioreg[PADS_GPIO_0];
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sampletab[(buffersize * registerbysample - 2)] = (0x5A << 24) + (1 & 0x7) + (1 << 4) + (0 << 3); // Amp 1
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sampletab[(buffersize * registerbysample - 1)] = (0x5A << 24) + (0 & 0x7) + (1 << 4) + (0 << 3); // Amp 0
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SetDmaAlgo();
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}
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atv::~atv()
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{
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clkgpio::disableclk(4);
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padgpio pad;
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pad.gpioreg[PADS_GPIO_0] = Originfsel;
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}
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void atv::SetDmaAlgo()
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{
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dma_cb_t *cbp = cbarray;
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int LineResolution = 625;
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for (int frame = 0; frame < 2; frame++)
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{
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//32us*5 or 6
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for (int i = 0; i < 5+frame; i++)
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{
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//2us 0,30us 1
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//@0
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//SYNC preegalisation 2us
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cbp->info = 0; //BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ;
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cbp->src = mem_virt_to_phys(&usermem[(buffersize * registerbysample - 1)]); //Amp 0
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cbp->dst = 0x7E000000 + (PADS_GPIO_0 << 2) + PADS_GPIO;
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cbp->length = 4;
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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// Delay
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if (syncwithpwm)
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PWM);
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else
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PCM_TX);
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cbp->src = mem_virt_to_phys(cbarray); // Data is not important as we use it only to feed the PWM
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if (syncwithpwm)
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cbp->dst = 0x7E000000 + (PWM_FIFO << 2) + PWM_BASE;
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else
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cbp->dst = 0x7E000000 + (PCM_FIFO_A << 2) + PCM_BASE;
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cbp->length = 4 * 2; //2us
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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//SYNC preegalisation 30us
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cbp->info = 0; //BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ;
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cbp->src = mem_virt_to_phys(&usermem[(buffersize * registerbysample - 2)]); //Amp 1
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cbp->dst = 0x7E000000 + (PADS_GPIO_0 << 2) + PADS_GPIO;
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cbp->length = 4;
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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// Delay
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if (syncwithpwm)
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PWM);
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else
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PCM_TX);
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cbp->src = mem_virt_to_phys(cbarray); // Data is not important as we use it only to feed the PWM
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if (syncwithpwm)
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cbp->dst = 0x7E000000 + (PWM_FIFO << 2) + PWM_BASE;
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else
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cbp->dst = 0x7E000000 + (PCM_FIFO_A << 2) + PCM_BASE;
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cbp->length = 4 * 30; //30us
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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}
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//SYNC top trame
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for (int i = 0; i < 5; i++)
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{
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cbp->info = 0; //BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ;
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cbp->src = mem_virt_to_phys(&usermem[(buffersize * registerbysample - 1)]); //Amp 0 27us
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cbp->dst = 0x7E000000 + (PADS_GPIO_0 << 2) + PADS_GPIO;
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cbp->length = 4;
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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// Delay
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if (syncwithpwm)
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PWM);
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else
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PCM_TX);
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cbp->src = mem_virt_to_phys(cbarray); // Data is not important as we use it only to feed the PWM
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if (syncwithpwm)
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cbp->dst = 0x7E000000 + (PWM_FIFO << 2) + PWM_BASE;
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else
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cbp->dst = 0x7E000000 + (PCM_FIFO_A << 2) + PCM_BASE;
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cbp->length = 4 * 27; //27us
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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cbp->info = 0; //BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ;
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cbp->src = mem_virt_to_phys(&usermem[(buffersize * registerbysample - 2)]); //Amp 1 5us
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cbp->dst = 0x7E000000 + (PADS_GPIO_0 << 2) + PADS_GPIO;
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cbp->length = 4;
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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// Delay
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if (syncwithpwm)
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PWM);
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else
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PCM_TX);
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cbp->src = mem_virt_to_phys(cbarray); // Data is not important as we use it only to feed the PWM
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if (syncwithpwm)
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cbp->dst = 0x7E000000 + (PWM_FIFO << 2) + PWM_BASE;
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else
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cbp->dst = 0x7E000000 + (PCM_FIFO_A << 2) + PCM_BASE;
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cbp->length = 4 * 5; //5us
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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}
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//postegalisation ; copy paste from preegalisation
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for (int i = 0; i < 5; i++)
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{
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//2us 0,30us 1
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//@0
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//SYNC preegalisation 2us
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cbp->info = 0; //BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ;
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cbp->src = mem_virt_to_phys(&usermem[(buffersize * registerbysample - 1)]); //Amp 0
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cbp->dst = 0x7E000000 + (PADS_GPIO_0 << 2) + PADS_GPIO;
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cbp->length = 4;
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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// Delay
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if (syncwithpwm)
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PWM);
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else
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PCM_TX);
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cbp->src = mem_virt_to_phys(cbarray); // Data is not important as we use it only to feed the PWM
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if (syncwithpwm)
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cbp->dst = 0x7E000000 + (PWM_FIFO << 2) + PWM_BASE;
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else
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cbp->dst = 0x7E000000 + (PCM_FIFO_A << 2) + PCM_BASE;
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cbp->length = 4 * 2; //2us
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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//SYNC preegalisation 30us
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cbp->info = 0; //BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ;
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cbp->src = mem_virt_to_phys(&usermem[(buffersize * registerbysample - 2)]); //Amp 1
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cbp->dst = 0x7E000000 + (PADS_GPIO_0 << 2) + PADS_GPIO;
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cbp->length = 4;
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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// Delay
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if (syncwithpwm)
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PWM);
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else
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PCM_TX);
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cbp->src = mem_virt_to_phys(cbarray); // Data is not important as we use it only to feed the PWM
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if (syncwithpwm)
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cbp->dst = 0x7E000000 + (PWM_FIFO << 2) + PWM_BASE;
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else
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cbp->dst = 0x7E000000 + (PCM_FIFO_A << 2) + PCM_BASE;
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cbp->length = 4 * 30; //30us
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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}
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for (int line = 0; line < 305; line++)
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{
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//@0
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//SYNC 0/ 5us
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cbp->info = 0; //BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ;
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cbp->src = mem_virt_to_phys(&usermem[(buffersize * registerbysample - 1)]); //Amp 0
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cbp->dst = 0x7E000000 + (PADS_GPIO_0 << 2) + PADS_GPIO;
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cbp->length = 4;
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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// Delay
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if (syncwithpwm)
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PWM);
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else
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PCM_TX);
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cbp->src = mem_virt_to_phys(cbarray); // Data is not important as we use it only to feed the PWM
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if (syncwithpwm)
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cbp->dst = 0x7E000000 + (PWM_FIFO << 2) + PWM_BASE;
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else
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cbp->dst = 0x7E000000 + (PCM_FIFO_A << 2) + PCM_BASE;
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cbp->length = 4 * 4; //5us
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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//@0
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//SYNC 1/ 5us
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cbp->info = 0; //BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ;
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cbp->src = mem_virt_to_phys(&usermem[(buffersize * registerbysample - 2)]); //Amp 1
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cbp->dst = 0x7E000000 + (PADS_GPIO_0 << 2) + PADS_GPIO;
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cbp->length = 4;
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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// Delay
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if (syncwithpwm)
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PWM);
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else
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PCM_TX);
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cbp->src = mem_virt_to_phys(cbarray); // Data is not important as we use it only to feed the PWM
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if (syncwithpwm)
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cbp->dst = 0x7E000000 + (PWM_FIFO << 2) + PWM_BASE;
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else
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cbp->dst = 0x7E000000 + (PCM_FIFO_A << 2) + PCM_BASE;
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cbp->length = 4 * 6; //5us;
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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for (uint32_t samplecnt = 0; samplecnt < 52; samplecnt++) //52 us
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{
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sampletab[samplecnt * registerbysample] = (0x5A << 24) + (3 & 0x7) + (1 << 4) + (0 << 3); // Amplitude PAD
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//@0
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//DATA IN / 1us
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cbp->info = 0; //BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ;
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cbp->src = mem_virt_to_phys(&usermem[samplecnt * registerbysample]); //Amp 1
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cbp->dst = 0x7E000000 + (PADS_GPIO_0 << 2) + PADS_GPIO;
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cbp->length = 4;
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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// Delay
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if (syncwithpwm)
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PWM);
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else
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PCM_TX);
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cbp->src = mem_virt_to_phys(cbarray); // Data is not important as we use it only to feed the PWM
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if (syncwithpwm)
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cbp->dst = 0x7E000000 + (PWM_FIFO << 2) + PWM_BASE;
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else
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cbp->dst = 0x7E000000 + (PCM_FIFO_A << 2) + PCM_BASE;
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cbp->length = 4; //1us
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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}
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//FRONT PORSH
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//SYNC 2us
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cbp->info = 0; //BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ;
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cbp->src = mem_virt_to_phys(&usermem[(buffersize * registerbysample - 2)]); //Amp 1
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cbp->dst = 0x7E000000 + (PADS_GPIO_0 << 2) + PADS_GPIO;
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cbp->length = 4;
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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// Delay
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if (syncwithpwm)
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PWM);
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else
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PCM_TX);
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cbp->src = mem_virt_to_phys(cbarray); // Data is not important as we use it only to feed the PWM
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if (syncwithpwm)
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cbp->dst = 0x7E000000 + (PWM_FIFO << 2) + PWM_BASE;
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else
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cbp->dst = 0x7E000000 + (PCM_FIFO_A << 2) + PCM_BASE;
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cbp->length = 4 * 2; //2us
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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cbp++;
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}
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}
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cbp--;
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cbp->next = mem_virt_to_phys(cbarray); // We loop to the first CB
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//fprintf(stderr,"Last cbp : src %x dest %x next %x\n",cbp->src,cbp->dst,cbp->next);
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}
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void atv::SetTvSample(uint32_t Index, float Amplitude) //-1;1
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{
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Index = Index % buffersize;
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int IntAmplitude = round(abs(Amplitude) * 6.0) + 1; //1 to 7
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int IntAmplitudePAD = IntAmplitude;
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if (IntAmplitudePAD > 7)
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IntAmplitudePAD = 7;
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if (IntAmplitudePAD < 0)
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IntAmplitudePAD = 0;
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//fprintf(stderr,"Amplitude=%f PAD %d\n",Amplitude,IntAmplitudePAD);
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sampletab[(Index)*registerbysample] = (0x5A << 24) + (IntAmplitudePAD & 0x7) + (1 << 4) + (0 << 3); // Amplitude PAD
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PushSample(Index); // ??
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}
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void atv::SetTvSamples(float *sample, size_t Size)
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{
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size_t NbWritten = 0;
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int OSGranularity = 100;
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long int start_time;
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long time_difference = 0;
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struct timespec gettime_now;
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while (NbWritten < Size)
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{
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clock_gettime(CLOCK_REALTIME, &gettime_now);
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start_time = gettime_now.tv_nsec;
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int Available = GetBufferAvailable();
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int TimeToSleep = 1e6 * ((int)buffersize * 3 / 4 - Available) / SampleRate - OSGranularity; // Sleep for theorically fill 3/4 of Fifo
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if (TimeToSleep > 0)
|
|
{
|
|
//fprintf(stderr,"buffer size %d Available %d SampleRate %d Sleep %d\n",buffersize,Available,SampleRate,TimeToSleep);
|
|
usleep(TimeToSleep);
|
|
}
|
|
else
|
|
{
|
|
//fprintf(stderr,"No Sleep %d\n",TimeToSleep);
|
|
sched_yield();
|
|
}
|
|
clock_gettime(CLOCK_REALTIME, &gettime_now);
|
|
time_difference = gettime_now.tv_nsec - start_time;
|
|
if (time_difference < 0)
|
|
time_difference += 1E9;
|
|
//fprintf(stderr,"Measure samplerate=%d\n",(int)((GetBufferAvailable()-Available)*1e9/time_difference));
|
|
Available = GetBufferAvailable();
|
|
int Index = GetUserMemIndex();
|
|
int ToWrite = ((int)Size - (int)NbWritten) < Available ? Size - NbWritten : Available;
|
|
|
|
for (int i = 0; i < ToWrite; i++)
|
|
{
|
|
SetTvSample(Index + i, sample[NbWritten++]);
|
|
}
|
|
}
|
|
}
|