118 lines
3.5 KiB
C++
118 lines
3.5 KiB
C++
/*
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Copyright (C) 2018 Evariste COURJAUD F5OEO
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "stdio.h"
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#include "ngfmdmasync.h"
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ngfmdmasync::ngfmdmasync(uint64_t TuneFrequency,uint32_t SampleRate,int Channel,uint32_t FifoSize):bufferdma(Channel,FifoSize,2,1)
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{
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tunefreq=TuneFrequency;
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clkgpio::SetAdvancedPllMode(true);
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clkgpio::SetCenterFrequency(TuneFrequency,SampleRate); // Write Mult Int and Frac : FixMe carrier is already there
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clkgpio::SetFrequency(0);
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clkgpio::enableclk(4); // GPIO 4 CLK by default
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syncwithpwm=false;
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if(syncwithpwm)
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{
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pwmgpio::SetPllNumber(clk_plld,1);
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pwmgpio::SetFrequency(SampleRate);
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}
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else
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{
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pcmgpio::SetPllNumber(clk_plld,1);
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pcmgpio::SetFrequency(SampleRate);
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}
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SetDmaAlgo();
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// Note : Spurious are at +/-(19.2MHZ/2^20)*Div*N : (N=1,2,3...) So we need to have a big div to spurious away BUT
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// Spurious are ALSO at +/-(19.2MHZ/2^20)*(2^20-Div)*N
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// Max spurious avoid is to be in the center ! Theory shoud be that spurious are set away at 19.2/2= 9.6Mhz ! But need to get account of div of PLLClock
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}
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ngfmdmasync::~ngfmdmasync()
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{
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clkgpio::disableclk(4);
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}
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void ngfmdmasync::SetPhase(bool inversed)
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{
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clkgpio::SetPhase(inversed);
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}
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void ngfmdmasync::SetDmaAlgo()
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{
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dma_cb_t *cbp = cbarray;
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for (uint32_t samplecnt = 0; samplecnt < buffersize; samplecnt++)
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{
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// Write a frequency sample
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ;
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cbp->src = mem_virt_to_phys(&usermem[samplecnt*registerbysample]);
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cbp->dst = 0x7E000000 + (PLLA_FRAC<<2) + CLK_BASE ;
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cbp->length = 4;
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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//fprintf(stderr,"cbp : sample %x src %x dest %x next %x\n",samplecnt,cbp->src,cbp->dst,cbp->next);
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cbp++;
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// Delay
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if(syncwithpwm)
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP |BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PWM);
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else
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP |BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PCM_TX);
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cbp->src = mem_virt_to_phys(cbarray); // Data is not important as we use it only to feed the PWM
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if(syncwithpwm)
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cbp->dst = 0x7E000000 + (PWM_FIFO<<2) + PWM_BASE ;
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else
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cbp->dst = 0x7E000000 + (PCM_FIFO_A<<2) + PCM_BASE ;
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cbp->length = 4;
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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//fprintf(stderr,"cbp : sample %x src %x dest %x next %x\n",samplecnt,cbp->src,cbp->dst,cbp->next);
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cbp++;
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}
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cbp--;
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cbp->next = mem_virt_to_phys(cbarray); // We loop to the first CB
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//fprintf(stderr,"Last cbp : src %x dest %x next %x\n",cbp->src,cbp->dst,cbp->next);
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}
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void ngfmdmasync::SetFrequencySample(uint32_t Index,int Frequency)
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{
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Index=Index%buffersize;
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sampletab[Index]=(0x5A<<24)|GetMasterFrac(Frequency);
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//fprintf(stderr,"Frac=%d\n",GetMasterFrac(Frequency));
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PushSample(Index);
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}
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