Set minimum frequency of PLL 200MHZ instead of 600MHZ. Minimum frequency possible is now 200/4095=49khz

This commit is contained in:
F5OEO 2018-11-27 14:00:30 +00:00
parent b82638a3ca
commit aa02b85060

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@ -205,7 +205,8 @@ int clkgpio::ComputeBestLO(uint64_t Frequency, int Bandwidth)
//
// There may be improvements possible to this algorithm.
// Constants taken https://github.com/raspberrypi/linux/blob/ffd7bf4085b09447e5db96edd74e524f118ca3fe/drivers/clk/bcm/clk-bcm2835.c#L1763
#define MIN_PLL_RATE 400e6
//MIN RATE is NORMALLY 600MHZ
#define MIN_PLL_RATE 200e6
#define MIN_PLL_RATE_USE_PDIV 1700e6
#define MAX_PLL_RATE 4e9
#define XTAL_RATE 19.2e6