ha7ilm
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790281e533
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Added docs for = and ? function, added = function, tinkered around costas loop
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2017-04-02 12:51:53 +02:00 |
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ha7ilm
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df81d6847e
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An actually really working costas loop
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2017-04-01 21:30:58 +02:00 |
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ha7ilm
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c7137dc68e
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The costas loop seems to at least work
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2017-04-01 16:08:49 +02:00 |
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ha7ilm
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ca40a41d5a
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Fixed timing_recovery_cc output data
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2017-04-01 12:54:21 +02:00 |
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ha7ilm
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f88766677a
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Merged fir_interpolate_cc
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2017-03-31 21:25:17 +02:00 |
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ha7ilm
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ca578ea4bc
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bpsk_costas_loop_cc function added to csdr
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2017-03-31 21:23:07 +02:00 |
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ha7ilm
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7590dd78ab
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Added a costas loop algorithm
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2017-03-29 13:09:19 +02:00 |
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ha7ilm
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d3a7c6e12b
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Working PSK31 generator
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2017-03-27 13:44:01 +02:00 |
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ha7ilm
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c23693e885
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Added psk_modulator_u8_ci, duplicate_samples_ntimes_u8_u8i, psk31_interpolate_sine_cci, pack_bits_8to1_u8_u8i, psk31_varicode_encoder_u8_u8i
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2017-03-26 16:55:28 +02:00 |
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ha7ilm
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fabca11450
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Added some algorithms (untested)
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2017-03-25 23:47:23 +01:00 |
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ha7ilm
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2d5c27d3dc
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Added bpsk_costas_loop_cc base
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2017-03-14 09:12:09 +01:00 |
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ha7ilm
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eaea93c1e2
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GARDNER works as well!
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2017-03-06 23:04:20 +01:00 |
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ha7ilm
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a7ba9c91c9
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Fixed display of points
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2017-03-06 23:02:06 +01:00 |
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ha7ilm
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79a33b0d24
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Integrated EARLYLATE and GARDNER into one loop, tested only EARLYLATE
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2017-03-06 23:00:34 +01:00 |
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ha7ilm
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09c873c13d
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EARLYLATE now verified
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2017-03-06 22:31:32 +01:00 |
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ha7ilm
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dde8fa0d08
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GARDNER works, but we need a better way to calculate the error
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2017-03-05 19:56:15 +01:00 |
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ha7ilm
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306e4aeb91
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EARLYLATE actually works
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2017-03-05 19:16:34 +01:00 |
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ha7ilm
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f93e7c4a99
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Octave figures are now written into PNGs
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2017-03-05 17:21:38 +01:00 |
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ha7ilm
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a1a64b3a72
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EARLYLATE is also being plotted
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2017-03-05 16:30:12 +01:00 |
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ha7ilm
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2a03208e43
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timing_recovery_cc: a better graph
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2017-03-04 19:50:11 +01:00 |
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ha7ilm
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e1d4a4ff3b
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Less stdout at octave
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2017-03-04 19:17:11 +01:00 |
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ha7ilm
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818b6b1157
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timing_recovery_cc --octave now works
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2017-03-03 18:45:03 +01:00 |
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ha7ilm
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969992f734
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timing_recovery_cc outputs data, but segfaults with --octave
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2017-03-03 18:23:11 +01:00 |
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ha7ilm
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26c12746eb
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Added octave_complex_c, finished timing_recovery_cc debug, fixed indent
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2017-03-03 16:21:45 +01:00 |
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ha7ilm
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ccf09a1b99
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timing_recovery is timing_recovery_cc
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2017-03-03 11:20:49 +01:00 |
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ha7ilm
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2af14b8082
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Made timing_recovery_cc build
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2017-03-02 12:27:53 +01:00 |
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ha7ilm
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676e9388fc
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Added timing_recovery_cc
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2017-03-02 12:17:31 +01:00 |
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ha7ilm
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e524dc2af1
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Merged master to feature/digitalmods
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2017-02-27 20:07:38 +01:00 |
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ha7ilm
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3de0d42870
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Added to README and --help as well
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2017-02-19 16:22:49 +01:00 |
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ha7ilm
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7e87ccb2a1
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Working interpolator.
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2017-02-19 16:06:39 +01:00 |
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ha7ilm
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9ef8cd4b45
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Almost there at working interpolator
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2017-02-19 15:41:33 +01:00 |
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ha7ilm
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22ea31d5b1
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First modifications for fir_interpolate_cc, from last April
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2017-02-19 14:02:27 +01:00 |
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ha7ilm
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3246e20864
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Merged origin/master into nmux
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2017-01-19 17:00:16 +01:00 |
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ha7ilm
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6386e3f4d1
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merged master into nmux
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2017-01-15 21:12:34 +01:00 |
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Tatu Peltola
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38d567d96e
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Fix logaveragepower_cf for FFT sizes below 16384
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2016-10-22 22:16:47 +03:00 |
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Tatu Peltola
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8cbf028732
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Merge branch 'master' of https://github.com/tejeez/csdr
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2016-10-22 21:32:43 +03:00 |
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ha7ilm
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ef39d8dc27
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Fixed 24 bit conversions
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2016-06-23 10:50:08 +02:00 |
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ha7ilm
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de110ff719
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Fixed 24 bit conversions
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2016-06-21 00:23:43 +02:00 |
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ha7ilm
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c4b3527490
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Added convert_s24_f and convert_f_s24
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2016-06-21 00:14:03 +02:00 |
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Tatu Peltola
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d2a0099227
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Precalculate FFT window
Before this calculating FFT window was taking much more CPU time than calculating the FFT itself.
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2016-06-07 21:30:00 +03:00 |
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Tatu Peltola
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f9d6d22fe2
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Implement averaged FFT
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2016-06-07 21:30:00 +03:00 |
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ha7ilm
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4fbcc3f0a8
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Renamed loop filters
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2016-05-22 18:35:26 +02:00 |
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ha7ilm
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07ca9fd73f
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Changes to PLL, renamed bpsk31 line decoder to bpsk31_varicode2ascii_sy_u8
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2016-05-22 18:27:20 +02:00 |
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ha7ilm
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b36b01e9cf
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Current status (PLL modified)
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2016-05-18 14:56:05 +02:00 |
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ha7ilm
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ed35bb96e7
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Working on phase detector of the PLL
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2016-05-11 08:59:54 +02:00 |
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ha7ilm
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e084341ca2
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Working on 2nd order IIR loop filter
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2016-05-11 08:48:31 +02:00 |
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ha7ilm
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c0b4706592
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Fixed 1st order loop filter
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2016-05-10 22:59:14 +02:00 |
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ha7ilm
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33a8cf0482
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Several changes related to PLL
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2016-05-10 21:46:33 +02:00 |
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ha7ilm
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20a2cdc73c
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Got the VCO output inverted (and the signal as well), so now the output and the input are actually in phase.
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2016-05-09 14:02:24 +02:00 |
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ha7ilm
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4ecc84eefd
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Got PLL working with the 1st order IIR loop filter.
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2016-05-09 13:58:45 +02:00 |
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