ha7ilm
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969992f734
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timing_recovery_cc outputs data, but segfaults with --octave
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2017-03-03 18:23:11 +01:00 |
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ha7ilm
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26c12746eb
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Added octave_complex_c, finished timing_recovery_cc debug, fixed indent
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2017-03-03 16:21:45 +01:00 |
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ha7ilm
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ccf09a1b99
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timing_recovery is timing_recovery_cc
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2017-03-03 11:20:49 +01:00 |
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ha7ilm
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2af14b8082
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Made timing_recovery_cc build
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2017-03-02 12:27:53 +01:00 |
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ha7ilm
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676e9388fc
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Added timing_recovery_cc
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2017-03-02 12:17:31 +01:00 |
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ha7ilm
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e524dc2af1
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Merged master to feature/digitalmods
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2017-02-27 20:07:38 +01:00 |
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ha7ilm
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3246e20864
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Merged origin/master into nmux
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2017-01-19 17:00:16 +01:00 |
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ha7ilm
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6386e3f4d1
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merged master into nmux
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2017-01-15 21:12:34 +01:00 |
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Tatu Peltola
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38d567d96e
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Fix logaveragepower_cf for FFT sizes below 16384
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2016-10-22 22:16:47 +03:00 |
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Tatu Peltola
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8cbf028732
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Merge branch 'master' of https://github.com/tejeez/csdr
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2016-10-22 21:32:43 +03:00 |
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ha7ilm
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ef39d8dc27
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Fixed 24 bit conversions
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2016-06-23 10:50:08 +02:00 |
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ha7ilm
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de110ff719
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Fixed 24 bit conversions
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2016-06-21 00:23:43 +02:00 |
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ha7ilm
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c4b3527490
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Added convert_s24_f and convert_f_s24
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2016-06-21 00:14:03 +02:00 |
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Tatu Peltola
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d2a0099227
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Precalculate FFT window
Before this calculating FFT window was taking much more CPU time than calculating the FFT itself.
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2016-06-07 21:30:00 +03:00 |
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Tatu Peltola
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f9d6d22fe2
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Implement averaged FFT
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2016-06-07 21:30:00 +03:00 |
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ha7ilm
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4fbcc3f0a8
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Renamed loop filters
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2016-05-22 18:35:26 +02:00 |
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ha7ilm
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07ca9fd73f
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Changes to PLL, renamed bpsk31 line decoder to bpsk31_varicode2ascii_sy_u8
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2016-05-22 18:27:20 +02:00 |
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ha7ilm
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b36b01e9cf
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Current status (PLL modified)
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2016-05-18 14:56:05 +02:00 |
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ha7ilm
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ed35bb96e7
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Working on phase detector of the PLL
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2016-05-11 08:59:54 +02:00 |
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ha7ilm
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e084341ca2
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Working on 2nd order IIR loop filter
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2016-05-11 08:48:31 +02:00 |
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ha7ilm
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c0b4706592
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Fixed 1st order loop filter
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2016-05-10 22:59:14 +02:00 |
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ha7ilm
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33a8cf0482
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Several changes related to PLL
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2016-05-10 21:46:33 +02:00 |
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ha7ilm
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20a2cdc73c
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Got the VCO output inverted (and the signal as well), so now the output and the input are actually in phase.
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2016-05-09 14:02:24 +02:00 |
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ha7ilm
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4ecc84eefd
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Got PLL working with the 1st order IIR loop filter.
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2016-05-09 13:58:45 +02:00 |
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ha7ilm
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a89d174ec5
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Added pll_cc
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2016-05-09 12:59:08 +02:00 |
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ha7ilm
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d79807a67c
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Now we have a working serial_line_decoder_f_u8.
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2016-05-08 12:38:09 +02:00 |
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ha7ilm
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380bfded2c
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First concept of serial_line_decoder_f_u8.
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2016-05-08 09:33:40 +02:00 |
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ha7ilm
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ec37c6583c
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Added BPSK31 varicode decoding.
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2016-05-04 23:46:23 +02:00 |
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ha7ilm
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42ce9d4669
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Fixed handling a null input source for some functions, in order to work with the new squelch.
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2016-03-20 23:30:21 +01:00 |
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ha7ilm
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4230198d91
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Added a squelch
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2016-03-20 16:41:37 +01:00 |
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ha7ilm
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277075b397
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Renamed convert_f_i16 -> convert_f_s16 and convert_i16_f -> convert_s16_f. (csdr also triggers for the original functions, but they are deprecated.
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2016-02-14 11:19:36 +01:00 |
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ha7ilm
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03a3a9ab50
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Merged dev into master.
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2016-02-14 11:08:53 +01:00 |
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ha7ilm
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4380bec6fa
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Tested all shifts, and they seem to work!
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2015-11-30 00:20:22 +01:00 |
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ha7ilm
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95ebc0e790
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Fixed shift_addfast_cc/NEON, now it works! Added shift_unroll_cc.
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2015-11-29 22:46:06 +00:00 |
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ha7ilm
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965ea631fc
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Now at least we get a continuous output signal from shift_addfast_cc/NEON. And we get a good result if the shift_rate is 0! (Okay, we get a bad result for anything else...)
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2015-11-29 20:47:00 +00:00 |
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ha7ilm
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d28edcca3d
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Fixed a jump.
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2015-11-29 19:13:24 +00:00 |
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ha7ilm
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d24164db03
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Added NEON implementation of shift_addfast_cc.
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2015-11-29 19:05:28 +00:00 |
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ha7ilm
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4697928c38
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Added shift_addfast_cc and tests.
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2015-11-29 12:54:09 +00:00 |
|
Michael Ossmann
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a3ad1e62d9
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converters for signed chars, compatible with hackrf_transfer
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2015-11-22 12:53:10 -07:00 |
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ha7ilm
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0e8ae4bdff
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Added fixed_amplitude_cc; fixed add_dcoffset_cc.
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2015-11-01 11:30:03 +00:00 |
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ha7ilm
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fb5899f087
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Added FM modulator.
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2015-10-31 15:42:17 +00:00 |
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ha7ilm
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0800e4f431
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Added AM modulator and test.
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2015-10-31 15:22:33 +00:00 |
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ha7ilm
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c89f6e026b
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Of course can't null by OR instructions
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2015-09-30 15:04:46 +00:00 |
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ha7ilm
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9cec3782e2
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Added NEON optimization for DDC.
Buffer size can now automatically adjust to sampling rate changes between csdr processes.
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2015-09-30 13:52:43 +00:00 |
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ha7ilm
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c50ffaac1b
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Added new features, e.g. the IMA ADPCM codec and sdr.js
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2015-08-16 23:40:42 +02:00 |
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ha7ilm
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9e5ce0cc3b
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fix parameter naming mistake: rolloff -> transition_bw
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2014-12-13 23:46:41 +01:00 |
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ha7ilm
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a671a43898
|
add a predefined filter for 44100sps to deemphasis_nfm_ff
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2014-12-12 10:22:57 +01:00 |
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ha7ilm
|
07c6a7df3a
|
initial commit
|
2014-11-28 16:44:41 +01:00 |
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