Commit graph

245 commits

Author SHA1 Message Date
ha7ilm
dd51b9cc04 nmux: seems to work now 2017-01-13 12:00:43 +01:00
ha7ilm
ac392f4ead nmux: implemented select properly at the end 2017-01-12 23:52:53 +01:00
ha7ilm
2f633f1f29 nmux: hacking around select 2017-01-12 23:32:45 +01:00
ha7ilm
da13229456 nmux: fixed how wait conditions and mutexes work, according to man 2017-01-12 19:10:27 +01:00
ha7ilm
795a77e7ee nmux: rearranged read() code for fixing EAGAINs 2017-01-12 18:57:23 +01:00
ha7ilm
8b4323237f nmux: fixed cmp op 2017-01-12 17:50:51 +01:00
ha7ilm
20f107b578 nmux: fixed unlocked mutex in tsmpool 2017-01-12 17:45:59 +01:00
ha7ilm
1177e03660 nmux: things start to work 2017-01-12 16:56:54 +01:00
ha7ilm
c2058aa34e nmux: client now uses poll; more messages are printed if NMUX_DEBUG is on 2017-01-12 16:24:59 +01:00
ha7ilm
47084804da nmux: Fixed some bugs and added a lot of debug info 2017-01-12 15:27:48 +01:00
ha7ilm
3941ce49e7 nmux compiles, also fixed a segfault related to getopt 2017-01-11 10:48:25 +01:00
ha7ilm
3ad4d15945 Finished nmux, now working on making it compile 2017-01-10 20:21:30 +01:00
ha7ilm
377faec68e Started to work on nmux today 2017-01-10 10:34:42 +01:00
András Retzler
1080e4ad23 Merge pull request #19 from tejeez/master
FFT improvements from @teejez
2016-10-29 19:42:56 +02:00
Tatu Peltola
38d567d96e Fix logaveragepower_cf for FFT sizes below 16384 2016-10-22 22:16:47 +03:00
Tatu Peltola
8cbf028732 Merge branch 'master' of https://github.com/tejeez/csdr 2016-10-22 21:32:43 +03:00
Rico van Genugten
12d7db8b49 Fixed issue simonyiszk/csdr#15 by fixing allocating size in bytes instead of size in amount of taps 2016-10-06 11:28:34 +00:00
Rico van Genugten
7ba726af5b Fixed issue simonyiszk/csdr#15 by using veor instead of vmov to zero accumulators in fir_decimate_cc. Also removed some unused variables 2016-10-06 09:12:34 +00:00
ha7ilm
11d639b7a3 Added nmux 2016-09-20 23:53:06 +02:00
ha7ilm
f33a05250c Before starting to work on nmux 2016-09-20 22:37:06 +02:00
ha7ilm
8952449b09 Fixing bug: was using -msse4 for sse4a instead of -msse4a 2016-09-19 13:15:07 +02:00
ha7ilm
5042981410 Fixed TOTAL_MEMORY for emcc 2016-07-24 12:15:11 +02:00
ha7ilm
ef39d8dc27 Fixed 24 bit conversions 2016-06-23 10:50:08 +02:00
ha7ilm
de110ff719 Fixed 24 bit conversions 2016-06-21 00:23:43 +02:00
ha7ilm
2890740e3e Fixed help message 2016-06-21 00:14:40 +02:00
ha7ilm
c4b3527490 Added convert_s24_f and convert_f_s24 2016-06-21 00:14:03 +02:00
ha7ilm
91c91425de 1R1W mode fixed 2016-06-07 22:15:40 +02:00
ha7ilm
5064d3b72c Added a lot of things, tsmpool should now work in 1R1W mode as well 2016-06-07 22:14:36 +02:00
Tatu Peltola
d2a0099227 Precalculate FFT window
Before this calculating FFT window was taking much more CPU time than calculating the FFT itself.
2016-06-07 21:30:00 +03:00
Tatu Peltola
f9d6d22fe2 Implement averaged FFT 2016-06-07 21:30:00 +03:00
ha7ilm
d442696cb8 Don't allow readers reach the buffer currently being filled. 2016-06-04 23:05:38 +02:00
ha7ilm
3a38be042a We don't need the client id at all. 2016-06-04 22:56:20 +02:00
ha7ilm
461390edf7 Written some more code for ddcd 2016-06-04 22:54:17 +02:00
ha7ilm
4737a7e808 Current state 2016-06-04 17:42:29 +02:00
ha7ilm
c1a42d1eff Did not build; fixed 2016-05-22 18:45:56 +02:00
ha7ilm
4fbcc3f0a8 Renamed loop filters 2016-05-22 18:35:26 +02:00
ha7ilm
07ca9fd73f Changes to PLL, renamed bpsk31 line decoder to bpsk31_varicode2ascii_sy_u8 2016-05-22 18:27:20 +02:00
ha7ilm
b36b01e9cf Current status (PLL modified) 2016-05-18 14:56:05 +02:00
ha7ilm
ed35bb96e7 Working on phase detector of the PLL 2016-05-11 08:59:54 +02:00
ha7ilm
e084341ca2 Working on 2nd order IIR loop filter 2016-05-11 08:48:31 +02:00
ha7ilm
c0b4706592 Fixed 1st order loop filter 2016-05-10 22:59:14 +02:00
ha7ilm
33a8cf0482 Several changes related to PLL 2016-05-10 21:46:33 +02:00
ha7ilm
88068ec517 Got the VCO output inverted (and the signal as well), so now the output and the input are actually in phase. 2016-05-09 14:06:03 +02:00
ha7ilm
20a2cdc73c Got the VCO output inverted (and the signal as well), so now the output and the input are actually in phase. 2016-05-09 14:02:24 +02:00
ha7ilm
4ecc84eefd Got PLL working with the 1st order IIR loop filter. 2016-05-09 13:58:45 +02:00
ha7ilm
a89d174ec5 Added pll_cc 2016-05-09 12:59:08 +02:00
ha7ilm
d79807a67c Now we have a working serial_line_decoder_f_u8. 2016-05-08 12:38:09 +02:00
ha7ilm
380bfded2c First concept of serial_line_decoder_f_u8. 2016-05-08 09:33:40 +02:00
ha7ilm
7c36a0ffce Fixed usage 2016-05-05 23:59:44 +02:00
ha7ilm
ec37c6583c Added BPSK31 varicode decoding. 2016-05-04 23:46:23 +02:00